lt; = dep.txt (aka its the first dependancy) # .SUFFIXES appends these to suffixes used for inference rules .SUFFIXES: .tmp .txt all: tester.txt # make a .txt file using a .tmp file # lt; for the .tmp file # $@ for the .txt file # .inextension.outextension: .tmp.txt: cat lt; > $* ``` ## Specifying dependency targets ```bash final_target: sub_target final_target.c Recipe_to_create_final_target sub_target: sub_target.c Recipe_to_create_sub_target ``` ```bash say_hello: echo "Hello World" ``` - `say_hello:` == _The Target_ - _prerequisites_ or _dependencies_ follow the target - `echo "Hello World"` == _The Recipe_ - The _target_, _prerequisites_, and _recipes_ together make a _rule_. - **Suppress command** text and only show output with `@` like `@echo "hello world"` ```bash say_hello: @echo "Hello World" generate: @echo "Creating empty text files..." touch file-{1..10}.txt clean: @echo "Cleaning up..." rm *.txt ``` - This will only run the `say_hello` function because it's the default target ( the first thing ) - to hard code the default target, include this at beginning of file: `.DEFAULT_GOAL := generate` - To instead run all targets the target `all` is used to call all other targets ```bash all: say_hello generate say_hello: @echo "Hello World" generate: @echo "Creating empty text files..." touch file-{1..10}.txt clean: @echo "Cleaning up..." rm *.txt ``` ## Variable aka Macros > are like variable replacement in makefiles ```bash # ================== # USING VARIABLES (aka macros) # ================== # VARIABLENAME = VALUE OF VARIABLE # they expand using the syntax $(VARIABLENAME) TMP = tester1.txt OUTPUT = tester2.txt $(OUTPUT): $(TMP) cat $(TMP) > $(OUTPUT) $(TMP): echo "this is a test" > $(TMP) ```